Verification Engineer Manager
Location: Milpitas, California, USA
Dept/Division: Digital Hardware Engineering
In this position, you will lead/manage a team that validates the ASIC components for leading edge Broadband Network Access products using new wireless communication technologies. You will work closely with architecture, platform and product engineering groups and be responsible for all verification/validation tasks for the entire chip, including Verilog coding, pre-silicon validation, performance verification and silicon debug. You will be responsible for ASIC and system level verification environment. You will design and implement the simulation environment for all the in-house ASIC products. You will also:
Lead the design of the Simulation environment for ASIC, FPGA, and board level.
Participate in the verification of the new wireless MAC spec - including and not limited to 802.11.
Document complete module and integration test plans for entire ASIC and system level verification environment.
Perform ASIC and system level module and Integration test.
Debug ASIC and System level problems. From a management perspective you will:
Take ownership for all assigned tasks and drive them to completion successfully
Exercise considerable latitude in determining technical objectives of assignment.
Interface cross-functionally and develop a sense of customer orientation.
Provide technical guidance to small teams. Mentor junior team members.
Encourage and accept personal feedback.
Resolve conflicts by fostering team communications.
Use judgment to solve problems where protocol might not exist.
Apply high degree of ingenuity using broad parameters for foundation of decisions.
This position requires a BS/MS in Electrical Engineering or Computer Science and 8+ years of engineering management experience. You must also possess the following:
Knowledge of networking industry
Experience managing verification teams (very large transistor count designs)
Working with tool vendors on next generation capabilities
Understanding of verification environment tradeoffs
Partitioning work among team members, building strong system validation capabilities.
Ability to execute to programs on-time and on-budget
Excellent organization and communication skills
Solid engineering background
Contact: [email protected]