Location: Milpitas, California, USA
Dept/Division: Digital Hardware Engineering
In this position, you will join a team that validates the ASIC components for leading edge Broadband Network Access products using new wireless communication technologies. You will work closely with architecture, platform and product engineering groups and be responsible for all verification/validation tasks for one or more blocks, including Verilog coding, pre-silicon validation, performance verification and silicon debug. You will be responsible for ASIC and system level verification. You will design and implement simulation environment for all the in-house ASIC products. You will also:
Participate in the design of the Simulation environment for ASIC and board.
Participate in the verification of the new wireless MAC spec Ð including and not limited to 802.11.
Document complete module and integration test plans for your block.
Perform ASIC and system level module and Integration test.
Debug ASIC and System level problems.
This position requires a BS/MS in Electrical or Computer Engineering with 3+ years of design/validation experience. You must possess some of the following:
A good understanding of logic design
Experience with functional validation
Familiarity with Verilog, Synopsys VCS, Perl, Tcl
A good understanding of PCI bus and CPU interface.
Knowledge of SDRAM protocols, UART functionality and Flash are added advantages
Knowledge of Networking protocols such as Ethernet and OC-12 a plus
Knowledge of PC architecture, design automation tools and PERL*/Shell programming desired.
Experience in the design of low power components a plus.
Contact: [email protected]