Location: Milpitas, California, USA
Dept/Division: Digital Hardware Engineering
In this position, you will join a team that designs the ASIC components for leading edge Broadband Network Access products using new wireless communication technologies. You will work closely with architecture, platform and product engineering groups and be responsible for all design tasks for one or more blocks, including Verilog coding, synthesis, performance verification and silicon debug. You will be responsible for ASIC and system level design. You will design and implement the in-house ASIC products. You will also:
Develop our next-generation of communication chips enabling new wireless communication technologies such as RF and 802.11
Define and design issues related to the embedded IP core such as CPU, ENET and USB.
Work closely with architects and post-silicon groups to bring products into production.
Perform product definition, MAS development, Verilog coding, functional validation, synthesis, speed path analysis and/or layout.
Work with senior engineers and provide innovative solutions for power, performance, timing and area requirements
Debug ASIC and System level problems.
This position requires a BS/MS in Electrical or Computer Engineering with 3+ years of design/validation experience. You must possess some of the following:
Excellent understanding of logic design.
Extensive coursework in VLSI circuit design, logic design, computer architecture or communication protocols
Familiarity with Verilog, Synopsys VCS, Perl, Tcl
Excellent understanding of PCI bus and CPU interface.
Knowledge of SDRAM protocols, UART functionality and Flash are added advantages
Knowledge of Networking protocols such as Ethernet and OC-12 a plus.
Experience in the design of low power components a plus
Knowledge of PC architecture, design automation tools and PERL*/Shell programming desired.
Understanding of wireless communication protocols or low power design methodologies a big plus
Contact: [email protected]